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Most likely projection
Tilera and Taiwanese Quanta Computer have launched the S2Q server which was targeted
specifically to tackle today's cloud computing workloads. It was designed in collaboration with cloud
datacenter providers, end customers and software partners.
Tilera says it can get 10,752 cores in one 8-kilowatt rack in a data center. The S2Q server will be
available in September, 2010 in limited quantities. Each TilePro chip sells for $900 in 200-unit
quantities.
A competitor Seamicro has a 512 core server which is created by putting 512 Intel Atom Z530 cores
into a 10U form factor, including switching and storage for the server nodes. The Tilera S2Q is 5
times thinner than the Seamicro server. (10U width is five times the 2U width of Tilera.)
See the Tilera 64 core chip for an example of how these chips are making a difference in the
progress of computing:
http://www.tilera.com/products/TILE64.php
World's highest density and highest compute 2U server
8 nodes each containing the 64-core TILEPro64 processor
512 cores providing up to 1.3 trillion operations per second (1.3 TeraFLOPS)
176 Gbps of I/O bandwidth
Up to 64 DIMM slots
Up to twenty-four 2.5" hot-plug SAS, SATA or solid state hard drives.
Power efficient and eco-friendly server
Each server node consumes 35-50 watts max
S2Q servers enable up to 10,000 cores in a eight kilowatt rack.
90 percent efficient hot-plug power supplies.
Shared fans and power supplies to conserve space and power for an eco-friendly design.
Tilera Plans 100 cores in 2011 and 200 cores in 2013 and to Keep doubling Cores per Chip.
Tilera's roadmap is to enable 10,000 cores per-rack today, 20,000 cores in 2011, and 40,000
cores by 2013.
The Quanta Computer S2Q server has 512 cores in a 2U server that uses under 400 watts. Next
year, Tilera will bring to market the TILE-Gx family with 100 cores in 40 nm process technology, and
in 2013, Tilera will offer its 200-core processor, codenamed Stratton, in 28 nm.
Tilera's innovations in adding many cores on the same processor, providing full cache coherency
across those cores, supporting virtualization, and distributing resources through its iMesh(TM)
technology, are the fundamental components needed for the new computing era. Combined with
the open source revolution and the parallel nature of cloud applications, Tilera's processors
provide the right platform for cloud computing. Today, a server using one TILEPro64 processor and
consuming 50 watts provides the same performance as a dual-socket Intel Xeon 5500 server
consuming 250 watts.
ArsTechnica has coverage as well
Here is a picture of the S2Q motherboard.
SGI Petaflop per Cabinet
SGI talked about using Tilera chips and GPGPUs to achieve a petaflop in one cabinet.
The current Tilera server will have 26 teraFLOPS per rack and use 8 KW.
In 2011, about 50 teraFLOPs per rack with 100 core chips with a 40nm process.
Approximately using 12 KW per rack. (Note, Intel will be in production with 22nm by the fall of 2011.)
In 2013, about 100 teraflops per rack with 200 core chips with a 32 nm process.
This would use approximately 8-16 KW per rack.
In 2015, about 200 teraflops per rack with 400 cores per chip using a 22 nm process
This would use about 12-25 KW per rack.
In 2017, about 400 teraflops per rack with 800 cores per chip using a 15 nm process.
This would be about 12-25 KW per rack.
So about 15-30 MW and about 1200 cabinets to get to an exaflop supercomputer using just future
Tilera chips. If they can get more performance from a mix of Tilera chips and future GPGPUs then
you could use few cabinets and possibly less power to build an exaflop supercomputer.
Intel was using 32 nm process by the end of 2009 and also had 22 nm prototypes working by
September of 2009. They should be in production of 22 nm by the fall of 2011.
Intel previews 50-core Knights Corner processor
updated 11:25 am EDT, Mon May 31, 2010 Intel Knights Corner targets highly parallel PCs
Intel held a surprise in store today as it unveiled its first plans for a production many-core
processor. Codenamed Knights Corner, the 22 nanometer chip would use a new, x86-based Many
Integrated Core (MIC) architecture that would allow for many small processors working together on
very parallel tasks. Over 50 cores should fit on a single chip once the technology is advanced, Intel
said.
The design hasn't yet been given a full briefing but is based on technology from the 48-core Single-
Chip Cloud Computer processor and the now-cancelled Larrabee graphics. These use a grid of
many cores joined together by a form of network that keeps the data flowing between each core at
as high a speed as possible, preventing some of the usual diminishing returns of multiple cores.
No set release date has been given, but Intel is seeding early developer kits now and plans a wider
set of tools in the second half of the year. The semiconductor firm is primarily targeting servers and
workstations that could use the parallelism but would otherwise need many expensive and power-
hungry Xeon processors for the same goal. The company still expects some tasks to run faster on
Xeons but sees Knights Corner as an alternative.
The chip design isn't tied to a particular platform but may potentially serve very multiprocessing-
aware platforms like Mac OS X Snow Leopard. Grand Central Dispatch, an API in Apple's OS, is
designed to optimize apps to make full use of as many cores as they need. It should scale
dynamically and could let apps make use of as many hardware cores as exist in the system.
Read more: http://www.electronista.com/articles/10/05/31/intel.knights.corner.targets.highly.parallel.
pcs/#ixzz0sYmMNwRV
See also:
http://arstechnica.com/business/news/2010/06/tilera-launches-512-core-server-for-the-cloud.ars
Send me your opinion at dafacxt@gmail.com
Tilera and Taiwanese Quanta Computer have launched the S2Q server which was targeted
specifically to tackle today's cloud computing workloads. It was designed in collaboration with cloud
datacenter providers, end customers and software partners.
Tilera says it can get 10,752 cores in one 8-kilowatt rack in a data center. The S2Q server will be
available in September, 2010 in limited quantities. Each TilePro chip sells for $900 in 200-unit
quantities.
A competitor Seamicro has a 512 core server which is created by putting 512 Intel Atom Z530 cores
into a 10U form factor, including switching and storage for the server nodes. The Tilera S2Q is 5
times thinner than the Seamicro server. (10U width is five times the 2U width of Tilera.)
See the Tilera 64 core chip for an example of how these chips are making a difference in the
progress of computing:
http://www.tilera.com/products/TILE64.php
World's highest density and highest compute 2U server
8 nodes each containing the 64-core TILEPro64 processor
512 cores providing up to 1.3 trillion operations per second (1.3 TeraFLOPS)
176 Gbps of I/O bandwidth
Up to 64 DIMM slots
Up to twenty-four 2.5" hot-plug SAS, SATA or solid state hard drives.
Power efficient and eco-friendly server
Each server node consumes 35-50 watts max
S2Q servers enable up to 10,000 cores in a eight kilowatt rack.
90 percent efficient hot-plug power supplies.
Shared fans and power supplies to conserve space and power for an eco-friendly design.
Tilera Plans 100 cores in 2011 and 200 cores in 2013 and to Keep doubling Cores per Chip.
Tilera's roadmap is to enable 10,000 cores per-rack today, 20,000 cores in 2011, and 40,000
cores by 2013.
The Quanta Computer S2Q server has 512 cores in a 2U server that uses under 400 watts. Next
year, Tilera will bring to market the TILE-Gx family with 100 cores in 40 nm process technology, and
in 2013, Tilera will offer its 200-core processor, codenamed Stratton, in 28 nm.
Tilera's innovations in adding many cores on the same processor, providing full cache coherency
across those cores, supporting virtualization, and distributing resources through its iMesh(TM)
technology, are the fundamental components needed for the new computing era. Combined with
the open source revolution and the parallel nature of cloud applications, Tilera's processors
provide the right platform for cloud computing. Today, a server using one TILEPro64 processor and
consuming 50 watts provides the same performance as a dual-socket Intel Xeon 5500 server
consuming 250 watts.
ArsTechnica has coverage as well
Here is a picture of the S2Q motherboard.
SGI Petaflop per Cabinet
SGI talked about using Tilera chips and GPGPUs to achieve a petaflop in one cabinet.
The current Tilera server will have 26 teraFLOPS per rack and use 8 KW.
In 2011, about 50 teraFLOPs per rack with 100 core chips with a 40nm process.
Approximately using 12 KW per rack. (Note, Intel will be in production with 22nm by the fall of 2011.)
In 2013, about 100 teraflops per rack with 200 core chips with a 32 nm process.
This would use approximately 8-16 KW per rack.
In 2015, about 200 teraflops per rack with 400 cores per chip using a 22 nm process
This would use about 12-25 KW per rack.
In 2017, about 400 teraflops per rack with 800 cores per chip using a 15 nm process.
This would be about 12-25 KW per rack.
So about 15-30 MW and about 1200 cabinets to get to an exaflop supercomputer using just future
Tilera chips. If they can get more performance from a mix of Tilera chips and future GPGPUs then
you could use few cabinets and possibly less power to build an exaflop supercomputer.
Intel was using 32 nm process by the end of 2009 and also had 22 nm prototypes working by
September of 2009. They should be in production of 22 nm by the fall of 2011.
Intel previews 50-core Knights Corner processor
updated 11:25 am EDT, Mon May 31, 2010 Intel Knights Corner targets highly parallel PCs
Intel held a surprise in store today as it unveiled its first plans for a production many-core
processor. Codenamed Knights Corner, the 22 nanometer chip would use a new, x86-based Many
Integrated Core (MIC) architecture that would allow for many small processors working together on
very parallel tasks. Over 50 cores should fit on a single chip once the technology is advanced, Intel
said.
The design hasn't yet been given a full briefing but is based on technology from the 48-core Single-
Chip Cloud Computer processor and the now-cancelled Larrabee graphics. These use a grid of
many cores joined together by a form of network that keeps the data flowing between each core at
as high a speed as possible, preventing some of the usual diminishing returns of multiple cores.
No set release date has been given, but Intel is seeding early developer kits now and plans a wider
set of tools in the second half of the year. The semiconductor firm is primarily targeting servers and
workstations that could use the parallelism but would otherwise need many expensive and power-
hungry Xeon processors for the same goal. The company still expects some tasks to run faster on
Xeons but sees Knights Corner as an alternative.
The chip design isn't tied to a particular platform but may potentially serve very multiprocessing-
aware platforms like Mac OS X Snow Leopard. Grand Central Dispatch, an API in Apple's OS, is
designed to optimize apps to make full use of as many cores as they need. It should scale
dynamically and could let apps make use of as many hardware cores as exist in the system.
Read more: http://www.electronista.com/articles/10/05/31/intel.knights.corner.targets.highly.parallel.
pcs/#ixzz0sYmMNwRV
See also:
http://arstechnica.com/business/news/2010/06/tilera-launches-512-core-server-for-the-cloud.ars
Send me your opinion at dafacxt@gmail.com
