Intel Developer Forum

Intel Developer Forum, San Francisco, US, Sept. 18-20, 2007

Penryn is current 65 nm chips moved to 45 nm technology.  They call these odd year
improvements the "tick" as compared with the even year improvements which are called the
"tock".  The Penryn chips were being made in September for planned shipments on November
12, 2007.  If one core in a Penryn multi-CPU chip is not being used, it can shift the operating
cores to a higher frequency in order to utilize the thermal budget of the whole chip.

Chips like the Q9650 Quad CPU 45nm with 12 MB of L2 cache are considered products of the
odd years because it was first shipped in November of 2007.  Odd years are "tick" years where
the geometry of the transistors are shrunken.

An even year improvement will occur in 2008 named Nehalem using the 45 nm technology
developed in the "tick" year of 2007.  These "tock" improvements take advantage of the
improved transistor density provided in odd years to cram more processors and capability onto
the chip.  Obviously the defect rate goes down as the process is improved.  This allows their
making of larger chips with more functions.  Intel will deliver 8 core dies in 2008 and each
core will be double threaded so that the chip will be capable of processing 16 simultaneous
threads.  This 8 core Nehalem chip is now running in prototype and has 731 million
transistors per chip.  The development team is in Oregon, USA.  They also have a "quickpath"
technology in order to speed up communications between CPUs.  Quickpath is a serial bus
which engages in full-channel training to optimize speed under given conditions.  They are
adding new instructions, some of which are for video encoding and decoding.

Consumer Electronics Show in Las Vegas January 7, 2008
Press kit: http://www.intel.com/pressroom/archive/releases/20080107comp.htm
The use of Hafnium insulated gates reduces the leakage of the transistor gates in the new
Intel processors.  This will lead to much lower power portable computer products.  The first
reduction in power will occur by moving to the Penryn process and the subsequent reduction
will occur by adding a low power mode when the device is not being used.

Intel Developer Forum 2008
Pat Gelsinger
http://intelstudios.edgesuite.net/fall_idf/pg/f.htm

Intel Developer Forum 2009